At GN, our Resound brand offers the market’s most advanced digital hearing aids based on a custom-designed state-of-the-art, fully programmable low power DSP platform.
Do you want to be part of the entire process of designing, prototyping and testing the chipsets for these devices?
Welcome to GN - we make life sound better
At our HQ in Ballerup, you will join a multicultural department of 26 IC designers in Resound’s central R&D with state-of-the-art facilities.
The IC Team develops complete chipsets in the field of ultra-low power processing and wireless communication. Being at the forefront of wearable IoT devices, we drive our success through constant innovation in our chipset architecture and CMOS technology.
Influence our IC design
You will work in cross-functional teams with other analog designers as well as digital and physical IC design engineers. Our common goal is to define, design, implement and verify our programmable DSP platform with 2.4GHz wireless communication capabilities and cloud connectivity.
“In this role, you’ll contribute to IC systems specifications and design, influencing architecture, design decisions, design flow and tools - this is your chance to make your mark on the way we do IC design.” explains Mark Brooks, Director IC Team.
Along with specialists in IC design, radio systems, audio processing and 3D electronic assembly, you will be involved in:
- IC block and chip-level specifications
- Ultra-low power analog circuit design (DC-DC converters, battery management, data converters, frequency synthesis, radio front ends and analog enablers for ULP digital cores)
- Analog simulation on circuit level (Spectre, Ultrasim, APS) and system level (AMS, VHDL-A/Verilog-A)
- Circuit layout and verification of nanometer CMOS designs
- Laboratory evaluation and (wafer) test of ICs
- Use our EDA flow for mixed-mode design
Experienced electronic engineer
As a design engineer, you are excited by the challenges that working with ultra-low power can bring. You enjoy teamwork and look forward to contributing with your skills as well as learning from colleagues in adjacent areas.
- Hold, as a minimum, a master’s degree in electronic engineering with emphasis on modern analog/mixed-mode IC design
- Have 5+ years of experience in CMOS analog, transistor level design, circuit simulation and layout (Spice, Cadence-Spectre or similar)
- Have experience with common EDA tools (Cadence, Mentor, Synopsys) for mixed-mode CMOS IC development
- Are familiar with design and layout aspects in nanometer CMOS analog/mixed-mode design
- Write and speak English well.
Would you like to know more?
To apply, use the ‘Ansøg’ link no later than December 6, 2019. Applications are assessed on a continuous basis, which is why we encourage you to send your application as soon as possible.
If you want to know more about the position, you are welcome to contact the Director of the IC Team, Mark Brooks, on phone +45 4081 6670.
Please write in your application that you've seen the job at Jobfinder.